AD9869BCPZ datasheet(6/36 Pages) AD

6 / 36 page

AD9869

Rev. 0 | Page 6 of 36

POWER SUPPLY SPECIFICATIONS

AVDD = 3.3 V, DVDD = CLKVDD = DRVDD = 3.3 V, RSET = 2 kΩ, full-duplex operation with fDATA = 80 MSPS1, unless otherwise noted.

Table 3.

Parameter

Temp

Test Level2

Min

Typ

Max

Unit

SUPPLY VOLTAGES

AVDD

Full

3.135

3.3

3.465

CLKVDD

Full

3.0

3.3

3.6

DVDD

Full

3.0

3.3

3.6

DRVDD

Full

3.0

3.3

3.6

IS_TOTAL (Total Supply Current)

Full

406

475

POWER CONSUMPTION

IAVDD + ICLKVDD (Analog Supply Current)

Full

311

342

IDVDD + IDRVDD (Digital Supply Current)

Full

133

POWER CONSUMPTION (Half-Duplex Operation with fDATA = 50 MSPS)3

Tx Mode

IAVDD + ICLKVDD

25°C

112

130

IDVDD + IDRVDD

25°C

49.5

Rx Mode

IAVDD + ICLKVDD

25°C

225

253

IDVDD + IDRVDD

25°C

36.5

POWER CONSUMPTION OF FUNCTIONAL BLOCKS1 (IAVDD + ICLKVDD)

RxPGA and LPF

25°C

III

ADC

25°C

III

108

TxDAC

25°C

III

IAMP (Programmable)

25°C

III

100

Reference

25°C

III

170

CLK PLL and Synthesizer

25°C

III

107

MAXIMUM ALLOWABLE POWER DISSIPATION

Full

1.66

STANDBY POWER CONSUMPTION

IS_TOTAL (Total Supply Current)

Full

POWER-DOWN DELAY (Using PWRDWN Pin)

RxPGA and LPF

25°C

III

440

ADC

25°C

III

TxDAC

25°C

III

IAMP

25°C

III

CLK PLL and Synthesizer

25°C

III

POWER-UP DELAY (Using PWRDWN Pin)

RxPGA and LPF

25°C

III

7.8

μs

ADC

25°C

III

TxDAC

25°C

III

μs

IAMP

25°C

III

CLK PLL and Synthesizer

25°C

III

μs

1 Default power-up settings for MODE = high and CONFIG = low, IOUTP_FS = 20 mA, does not include IAMP current consumption, which is application dependent.

2 See the Explanation of Test Levels section.

3 Default power-up settings for MODE = low and CONFIG = low.

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