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TCS3701 bảng dữ liệu(PDF) 25 Page - OSRAM GmbH |
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TCS3701 bảng dữ liệu(HTML) 25 Page - OSRAM GmbH |
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25 / 67 page ![]() Page 24 Datasheet, Public Document Feedback [v2-00] 2022-Dec-15 TCS3701 − Register O ver view ALS Configuration The ALS/color integration time is set using the ATIME field and ASTEP field (ASTEP register). The ALS integration time, in milliseconds, is equal to (ATIME + 1) × (ASTEP + 1) / 360. The reset value for ASTEP is 999 (2.78ms), and the recommended configuration for these two fields is ASTEP = 599 and ATIME = 29, which results in an integration time of 50ms. The ALS integration time also establishes the full scale ADC range, which is equal to (ATIME + 1) × (ASTEP + 1). If wait is enabled (WEN = 1), each new ALS sample is started based on WTIME. It is necessary for WTIME to be sufficiently large for ALS integration and any other functions to be completed within the time frame. The device will warn the user if the timing is configured incorrectly. If WTIME is too short, then ALS_TRIGGER_ERROR will be 1. Figure 26: ATIME Note(s): 1. Return to the Register Map (0x81). Addr: 0x81 ATIME Bit Field Reset Type Description 7:0 ATIME 0x00 R/W ALS Integration Time. Sets the number of ALS/color integration steps from 1 to 256. VALUE INTEGRATION TIME 0ASTEP nASTEP × (n+1) 255 256 × ASTEP |
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