1999 Jul 30

28

Philips Semiconductors

Product specification

Universal LCD driver for low multiplex rates

PCF8533

11 AC CHARACTERISTICS

Notes

1. Typical output duty cycle of 50%.

2. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

oscillator frequency at pad CLK

797

1536

3046

Hz

input CLK HIGH time

130

−−µs

input CLK LOW time

130

−−µs

SYNC propagation delay time

−

30

−

ns

SYNC LOW time

1

−−µs

driver delays with test loads

−−

30

µs

SCL clock frequency

−−

400

kHz

bus free time between a STOP and START

1.3

−−µs

START condition hold time

0.6

−−µs

set-up time for a repeated START condition

0.6

−−µs

SCL LOW time

1.3

−−µs

SCL HIGH time

0.6

−−µs

SCL and SDA rise time

−−

0.3

µs

SCL and SDA fall time

−−

0.3

µs

capacitive bus line load

−−

400

pF

data set-up time

100

−−

ns

data hold time

0

−−

ns

set-up time for STOP condition

0.6

−−µs

tolerable spike width on bus

−−

50

ns

Fig.18 Test loads.

handbook, full pagewidth

MGS120

Ω

3.3 k

Ω

1.5 k

0.5VDD

VDD

VSS

SDA,

SCL

CLK

1 nF

BP0 to BP3, and

S0 to S79

(2%)

(2%)

Ω

6.8

VDD

SYNC

(2%)