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IRCC2.0 bảng dữ liệu(PDF) 8 Page - SMSC Corporation |
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IRCC2.0 bảng dữ liệu(HTML) 8 Page - SMSC Corporation |
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8 / 87 page ![]() 8 Table 8 - Legacy Chip-Level Controls NAME SIZE (BITS) TYPE DESCRIPTION Tx Polarity 1 Input Output Mux. Transmit Polarity Rx Polarity 1 Input Output Mux. Receive Polarity Half Duplex 1 Input 16C550A UART Half Duplex Control IR Half Duplex Timeout 8 Input IR Transceiver Turnaround Time IR Mode 3 Input IR Mode Register Bits IR Location 2 Input IR Option Register Location Bits Tx Polarity Typically part of a 16C550A Serial Port Option Register. The value also appears in IrCC 2.0 Register Block One, Address Zero. Rx Polarity Typically part of a 16C550A Serial Port Option Register. The value also appears in IrCC 2.0 Register Block One, Address Zero. Half Duplex Typically part of a 16C550A Serial Port Option Register. The value also appears in IrCC 2.0 Register Block One, Address Zero. IR Half Duplex Timeout Typically part of a 16C550A Serial Port 2 Configuration Register. The value also appears in IrCC 2.0 Register Block One, Address Zero (see the IR Half Duplex Timeout Register (Address 1) on page 42). IR Mode Typically part of a 16C550A Serial Port Option Register. These values are also part of the IrCC 2.0 Block Control bits 3-5, Register Block One, Address Zero. IR Location Typically part of a 16C550A Serial Port IR Option Register. These values are the IrCC 2.0 Output Mux bits, Register Block One, Address One. Note: These legacy controls are uniformly updated in the IrCC 2.0 and the Top-Level Device Configuration Registers only when either set of registers is explicitly written using IOW or following a device-level POR. IrCC 2.0 software resets will not affect the legacy bits. |
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