AD9949

Rev. B | Page 24 of 36

H-COUNTER SYNCHRONIZATION

The H-Counter reset occurs seven CLI cycles following the HD falling edge. The PxGA steering is synchronized with the reset of the

internal H-Counter (see Figure 26).

As mentioned in the H-Counter Behavior section, the AD9949 H-counter rolls over to zero and continues counting when the maximum

counter length is exceeded. The newer AD9949A product does not roll over but holds at its maximum value until the next HD rising edge

occurs.

000

1

1

2

111

0

0

3

11

00

0123456789

10

11

12

14

15

0123

02

H-COUNTER

RESET

VD

NOTES

1. INTERNAL H-COUNTER IS RESET 7 CLI CYCLES AFTER THE HD FALLING EDGE (WHEN USING VDHDEDGE = 0).

2. TYPICAL TIMING RELATIONSHIP: CLI RISING EDGE IS COINCIDENT WITH HD FALLING EDGE.

3. PxGA STEERING IS SYNCRONIZED WITH THE RESET OF THE INTERNAL H-COUNTER (MOSAIC SEPARATE MODE IS SHOWN).

HD

XX

XX

X

X

X

PxGA GAIN

REGISTER

CLI

3

XX

XX

X

X

X

H-COUNTER

(PIXEL COUNTER)

X

X

X

X

X

X

Figure 26. H-Counter Synchronization