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AD9949 bảng dữ liệu(PDF) 4 Page - Analog Devices

tên linh kiện AD9949
Giải thích chi tiết về linh kiện  12-Bit CCD Signal Processor with Precision Timing Core
PDF  36 Pages
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Trang chủ  http://www.analog.com
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AD9949 bảng dữ liệu(HTML) 4 Page - Analog Devices

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AD9949
Rev. B | Page 4 of 36
ANALOG SPECIFICATIONS
TMIN to TMAX, AVDD = DVDD = 3.0 V, fCLI = 36 MHz, typical timing specifications, unless otherwise noted.
Table 3.
Parameter
Min
Typ
Max
Unit
Notes
CDS
Gain
0
dB
Allowable CCD Reset Transient1
500
mV
Maximum Input Range before Saturation1
1.0
V p-p
Maximum CCD Black Pixel Amplitude1
±50
mV
PIXEL GAIN AMPLIFIER (P×GA)
Gain Control Resolution
256
Steps
Gain Monotonicity
Minimum Gain
0
dB
Maximum Gain
18
dB
VARIABLE GAIN AMPLIFIER (VGA)
Maximum Input Range
1.0
V p-p
Maximum Output Range
2.0
V p-p
Gain Control Resolution
1024
Steps
Gain Monotonicity
Guaranteed
Gain Range
Minimum Gain (VGA Code 0)
6
dB
Maximum Gain (VGA Code 1023)
42
dB
BLACK LEVEL CLAMP
Clamp Level Resolution
256
Steps
Clamp Level
Measured at ADC output
Minimum Clamp Level (0)
0
LSB
Maximum Clamp Level (255)
255
LSB
A/D CONVERTER
Resolution
12
Bits
Differential Nonlinearity (DNL)
−1.0
±0.5
+1.0
LSB
No Missing Codes
Guaranteed
Integral Nonlinearity (INL)
8
LSB
Full-Scale Input Voltage
2.0
V
VOLTAGE REFERENCE
Reference Top Voltage (REFT)
2.0
V
Reference Bottom Voltage (REFB)
1.0
V
SYSTEM PERFORMANCE
Specifications include entire signal chain
VGA Gain Accuracy
Minimum Gain (Code 0)
5.0
5.5
6.0
dB
Maximum Gain (Code 1023)
40.5
41.5
42.5
dB
Peak Nonlinearity, 500 mV Input Signal
0.15
0.6
%
12 dB gain applied
Total Output Noise
0.8
LSB rms
AC grounded input, 6 dB gain applied
Power Supply Rejection (PSR)
50
dB
Measured with step change on supply
1 Input signal characteristics defined as follows:
50mV MAX
OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
1V MAX
INPUT SIGNAL RANGE



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