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TPS25751D bảng dữ liệu(PDF) 38 Page - Texas Instruments |
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TPS25751D bảng dữ liệu(HTML) 38 Page - Texas Instruments |
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38 / 89 page ![]() VVC_OVP PP5V VPHY_OVP VPHY_OVP CC1 CC2 VVC_RCP max(VCC1, VCC2) - VPP5V Control Logic Disable PP_CABLE and USB PD PHY Tx Figure 8-21. Overvoltage and Reverse Current Protection for CC1 and CC2 8.3.6 Default Behavior Configuration (ADCIN1, ADCIN2) Note This functionality is firmware controlled and subject to change. The ADCINx inputs to the internal ADC control the behavior of the TPS25751 in response to VBUS being supplied when VIN_3V3 is low (that is the dead-battery scenario). The ADCINx pins must be externally tied to the LDO_3V3 pin via a resistive divider as shown in the following figure. At power-up the ADC converts the ADCINx voltage and the digital core uses these two values to determine start-up behavior. The available start-up configurations include options for I2C target address of I2Ct_SCL/SDA, sink path control in dead-battery, and default configuration. ADC Mux an d Divi ders LDO_3V3 ADCINx Figure 8-22. ADCINx Resistor Divider TPS25751 SLVSH93 – OCTOBER 2023 www.ti.com 38 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TPS25751 |
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