UJA1069 datasheet(14/64 Pages) PHILIPS

14 / 64 page

UJA1069_2

Preliminary data sheet

Rev. 02 — 5 March 2007

14 of 64

NXP Semiconductors

UJA1069

LIN fail-safe system basis chip

6.4.3 Watchdog time-out behavior

Whenever the SBC operates in Standby mode, in Sleep mode or in Flash mode, the active

watchdog operates in Time-out mode. The watchdog has to be triggered within the actual

programmed period time; see Figure 6. The Time-out mode can be used to provide cyclic

wake-up events to the host microcontroller from Standby mode and Sleep mode.

In Standby and in Flash mode the nominal periods can be changed with any SPI access

to the Mode register.

Any illegal watchdog trigger code results in an immediate system reset, entering Start-up

mode.

6.4.4 Watchdog OFF behavior

In Standby mode and Sleep mode it is possible to switch off the watchdog entirely. For

fail-safe reasons this is only possible if the microcontroller has stopped program

execution. To ensure that there is no program execution, the V1 supply current is

monitored by the SBC while the watchdog is switched off.

When selecting the watchdog OFF code, the watchdog remains active until the

microcontroller supply current has dropped below the current monitoring threshold IthL(V1).

After the supply current has dropped below the threshold, the watchdog stops at the end

of the watchdog period. In case the supply current does not drop below the monitoring

threshold, the watchdog stays active.

If the microcontroller supply current increases above IthH(V1) while the watchdog is OFF,

the watchdog is restarted with the last used watchdog period time and a watchdog restart

interrupt is forced, if enabled.

In case of a direct mode change towards Standby mode with watchdog OFF selected, the

longest possible watchdog period is used. It should be noted that in Sleep mode V1

current monitoring is not active.

Fig 6.

Watchdog triggering using Time-out mode

mce627

trigger

via SPI

earliest

possible

trigger

point

latest

possible

trigger

point

trigger restarts period

(with different duration if

desired)

new period

trigger range

time-out

period

UJA1069 bảng dữ liệu(PDF) 14 Page - NXP Semiconductors

UJA1069 bảng dữ liệu(HTML) 14 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

bảng dữ liệu tải về

Link URL