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AT87C5103-ICSIL bảng dữ liệu(PDF) 16 Page - ATMEL Corporation |
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AT87C5103-ICSIL bảng dữ liệu(HTML) 16 Page - ATMEL Corporation |
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16 / 64 page ![]() 16 AT8xC5103 4134C–8051–09/04 Dual-data Pointer Register (DPTR) The additional data pointer can be used to speed up code execution and reduce code size in a number of ways. The dual DPTR structure is a way by which the device will specify the address of an external data memory location. There are two 16-bit DPTR registers that address the external memory, and a single bit called DPS = AUXR1/bit0 (see Table 8) that allows the program code to switch between them (Refer to Figure 7). Figure 7. Use of Dual-data Pointer Table 8. AUXR1: Auxiliary Register 1 Reset Value = XXXX X0X0 Note: 1. User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate. External Data Memory AUXR1(A2H) DPS DPH(83H) DPL(82H) 0 7 DPTR0 DPTR1 76 543 210 -- --- 0 - DPS Bit Number Bit Mnemonic Description 7-3 - Reserved(1) The value read from this bit is indeterminate. Do not set this bit. 2 0 always stuck at 0 1- Reserved The value read from this bit is indeterminate. Do not set this bit. 0DPS Data Pointer Selection Clear to select DPTR0. Set to select DPTR1. |
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