AT83SND1CXXX-ROTIL datasheet(150/212 Pages) ATMEL

150 / 212 page

150

4109J–8051–10/06

AT8xC51SND1C

Figure 18-7. SS Timing Diagram

18.1.6

Error Conditions

The following flags signal the SPI error conditions:

•

MODF in SPSTA signals a mode fault.

MODF flag is relevant only in master mode when SS usage is enabled (SSDIS bit cleared).

It signals when set that an other master on the bus has asserted SS pin and so, may create

a conflict on the bus with 2 master sending data at the same time.

•

A mode fault automatically disables the SPI (SPEN cleared) and configures the SPI in slave

mode (MSTR cleared).

MODF flag can trigger an interrupt as explained in Section "Interrupt", page 150.

MODF flag is cleared by reading SPSTA and re-configuring SPI by writing to SPCON.

•

WCOL in SPSTA signals a write collision.

WCOL flag is set when SPDAT is loaded while a transfer is on-going. In this case data is not

written to SPDAT and transfer continue uninterrupted. WCOL flag does not trigger any

interrupt and is relevant jointly with SPIF flag.

WCOL flag is cleared after reading SPSTA and writing new data to SPDAT while no transfer

is on-going.

18.2

Interrupt

The SPI handles 2 interrupt sources that are the “end of transfer” and the “mode fault” flags.

As shown in Figure 18-8, these flags are combined toghether to appear as a single interrupt

source for the C51 core. The SPIF flag is set at the end of an 8-bit shift in and out and is cleared

by reading SPSTA and then reading from or writing to SPDAT.

The MODF flag is set in case of mode fault error and is cleared by reading SPSTA and then writ-

ing to SPCON.

The SPI interrupt is enabled by setting ESPI bit in IEN1 register. This assumes interrupts are

globally enabled by setting EA bit in IEN0 register.

Figure 18-8. SPI Interrupt System

18.3

Configuration

The SPI configuration is made through SPCON.

18.3.1

Master Configuration

The SPI operates in master mode when the MSTR bit in SPCON is set.

SS (CPHA = 1)

SS (CPHA = 0)

SI/SO

Byte 1

Byte 2

Byte 3

ESPI

IEN1.2

SPI Controller

Interrupt Request

SPIF

SPSTA.7

MODF

SPSTA.4

AT83SND1CXXX-ROTIL bảng dữ liệu(PDF) 150 Page - ATMEL Corporation

AT83SND1CXXX-ROTIL bảng dữ liệu(HTML) 150 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL