AT83SND1CXXX-ROTIL datasheet(79/212 Pages) ATMEL

79 / 212 page

4109J–8051–10/06

AT8xC51SND1C

Reset Value = 1100 0000b

Table 77. AUDDAT Register

AUDDAT (S:9Dh) – Audio Interface Data Register

Reset Value = 1111 1111b

Table 78. AUDCLK Register

AUDCLK (S:ECh) – Audio Clock Divider Register

Reset Value = 0000 0000b

Bit

Number

Bit

Mnemonic

Description

7SREQ

Audio Sample Request Flag

Set in C51 audio source mode when the audio interface request samples (buffer

half empty). This bit generates an interrupt if not masked and if enabled in IEN0.

Cleared by hardware when samples are loaded in AUDDAT.

6UDRN

Audio Sample Under-run Flag

Set in C51 audio source mode when the audio interface runs out of samples

(buffer empty). This bit generates an interrupt if not masked and if enabled in

IEN0.

Cleared by hardware when samples are loaded in AUDDAT.

AUBUSY

Audio Interface Busy Bit

Set in C51 audio source mode when the audio interface can not accept more

sample (buffer full).

Cleared by hardware when buffer is no more full.

4 - 0

Reserved

The value read from these bits is always 0. Do not set these bits.

7654

3210

AUD7

AUD6

AUD5

AUD4

AUD3

AUD2

AUD1

AUD0

Bit

Number

Bit

Mnemonic

Description

7 - 0

AUD7:0

Audio Data

8-bit sampling data for voice or sound playing.

7654

3210

AUCD4

AUCD3

AUCD2

AUCD1

AUCD0

Bit

Number

Bit

Mnemonic

Description

7 - 5

Reserved

The value read from these bits is always 0. Do not set these bits.

4 - 0

AUCD4:0

Audio Clock Divider

5-bit divider for audio clock generation.

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