MSPM0C1104SDYYR datasheet(34/77 Pages) TI

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• Target receiver or transmitter mode with configurable clock stretching

• Support Standard-mode (Sm), with a bit rate up to 100 kbit/s

• Support Fast-mode (Fm), with a bit rate up to 400 kbit/s

• Support Fast-mode Plus (Fm+), with a bit rate up to 1 Mbit/s

• Separated transmit and receive FIFOs

• Support SMBus 3.0 with PEC, ARP, timeout detection, and host support

• Wakeup from low-power mode on address match

• Support analog and digital glitch filter for input signal glitch suppression

For more details, see the I2C chapter of the MSPM0 C-Series 24-MHz Microcontrollers Technical Reference

Manual.

8.19 WWDT

The windowed watchdog timer (WWDT) can be used to supervise the operation of the device, specifically code

execution. The WWDT can be used to generate a reset or an interrupt if the application software does not

successfully reset the watchdog within a specified window of time. Key features of the WWDT include:

• 25-bit counter

• Programmable clock divider

• Eight software selectable watchdog timer periods

• Eight software selectable window sizes

• Support for stopping the WWDT automatically when entering a sleep mode

• Interval timer mode for applications which do not require watchdog functionality

For more details, see the WWDT chapter of the MSPM0 C-Series 24-MHz Microcontrollers Technical Reference

Manual

8.20 Timers (TIMx)

The timer peripherals in these devices support the following key features. For specific configuration, see Table

8-8.

Specific features for the general-purpose timer (TIMGx) include:

• 16-bit down, up/down, or up counter with repeat-reload mode

• Selectable and configurable clock source

• 8-bit programmable prescaler to divide the counter clock frequency

• Two independent channels for

– Output compare

– Input capture

– PWM output

– One-shot mode

• Support quadrature encoder interface (QEI) for positioning and movement sensing

• Support synchronization and cross trigger among different TIMx instances in the same power domain

• Support interrupt trigger generation and cross peripherals (such as ADC) trigger capability

• Cross-trigger event logic for Hall sensor inputs

Specific features for the advanced timer (TIMAx) include:

• 16-bit down or up-down counter, with repeat-reload mode

• Selectable and configurable clock source

• 8-bit programmable prescaler to divide the counter clock frequency

• Repeat counter to generate an interrupt or event only after a given number of cycles of the counter

• Up to four independent channels for

– Output compare

– Input capture

– PWM output

– One-shot mode

• Shadow register for load and CC register available

MSPM0C1104, MSPM0C1103

SLASF90 – OCTOBER 2023

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