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WM8593 bảng dữ liệu(PDF) 26 Page - Wolfson Microelectronics plc |
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WM8593 bảng dữ liệu(HTML) 26 Page - Wolfson Microelectronics plc |
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26 / 98 page ![]() WM8593 Product Preview w PP Rev 1.0 January 2007 26 LEFT JUSTIFIED (LJ) MODE In LJ mode, the MSB of the input data is sampled by the WM8593 on the first rising edge of bit clock following a left/right clock transition. The MSB of output data changes on the same falling edge of bit clock as left/right clock and may be sampled on the next rising edge of bit clock. Left/right clock is high during the left channel audio data samples and low during the right channel audio data samples. Figure 13 LJ Mode Timing RIGHT JUSTIFIED (RJ) MODE In RJ mode the LSB of input data is sampled on the rising edge of bit clock preceding a left/right clock transition. The LSB of output data changes on the falling edge of bit clock preceding a left/right clock transition, and may be sampled on the next rising edge of bit clock. Left/right clock is high during the left channel audio data samples and low during the right channel audio data samples. Figure 14 RJ Mode Timing |
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