WM8593 datasheet(67/98 Pages) WOLFSON

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WM8593

PP Rev 1.0 January 2007

ADCR_INV

ADCL_INV

ADCL and ADCR Output Signal Inversion

0 = Output not inverted

1 = Output inverted

ADC_DATA_SEL[1:0]

ADC Data Output Select

00 = left data from ADCL, right data from ADCR (Normal Stereo)

01 = left data from ADCL, right data from ADCL (Mono Left)

10 = left data from ADCR, right data from ADCR (Mono Right)

11 = left data from ADCR, right data from ADCL (Reverse Stereo)

ADC_HPD

ADC High Pass Filter Disable

0 = High pass filter enabled

1 = High pass filter disabled

ADC_ZC_EN

ADC Digital Volume Control Zero Cross Enable

0 = Do not use zero cross, change volume instantly

1 = Use zero cross, change volume when data crosses zero

Figure 37 R13 – ADC Control Register 1

R14 (0Eh) – ADC Control Register 2 (ADC_CTRL2)

Bit #

Read

Write

N/A

Default

Bit #

Read

Write

N/A

ADC_BCLKDIV[2:0]

ADC_SR[2:0]

Default

N/A = Not Applicable (no function implemented)

Function

Description

ADC_SR[2:0]

ADC MCLK:LRCLK Ratio

000 = Auto detect

001 = reserved

010 = reserved

011 = 256fs

100 = 384fs

101 = 512fs

110 = 768fs

111 = Reserved

ADC_BCLKDIV[2:0]

ADC BCLK Rate (when ADC in Master Mode)

000 = MCLK / 4

001 = MCLK / 8

010 = 32fs

011 = 64fs

100 = 128fs

All other values of ADC_BCLKDIV[2:0] are reserved

Figure 38 R14 – ADC Control Register 2

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