WM8593 datasheet(52/98 Pages) WOLFSON

52 / 98 page

WM8593

Product Preview

PP Rev 1.0 January 2007

Figure 23 Clock Switching Example

If CLK_A in the previous example is not running the logic that controls switching between clocks will

not function. In this case, it is possible to force an update on any individual digital audio port or audio

interface using the relevant force bit. If this functionality is required, the relevant force bit should be

set to ‘1’ and then set back to ‘0’ again.

Example: Switching from MCLK2 to MCLK3 using the MCLK4 pin when MCLK2 is not present

CLK_A is applied to the MCLK2 pin, and CLK_B is applied to the MCLK3 pin.

Initially,

MCLK4_SEL[2:0]=001, so CLK_A is output on the MCLK4 pin. However, CLK_A is not running. To

change the output clock to CLK_B, set MCLK4_SEL[2:0]=010 and PORT4_FORCE=1. Finally, set

PORT4_FORCE=0 to complete the switch.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R37

AIF_MUX1

25h

PORT1_

FORCE

R38

AIF_MUX2

26h

PORT2_

FORCE

R39

AIF_MUX3

27h

PORT3_

FORCE

R40

AIF_MUX4

28h

PORT4_

FORCE

R41

AIF_MUX5

29h

PORT5_

FORCE

R42

AIF_MUX6

2Ah

DAC1_

FORCE

R43

AIF_MUX7

2Bh

DAC2_

FORCE

R44

AIF_MUX8

2Ch

ADC_

FORCE

Force Clocks to Change

0 = Wait until clocks are safe before

switching between clock sources

1 = Force clock sources to change

immediately

Note: These bits must be returned to ‘0’

before clocks will be output

Table 40 Audio Interface Mux Force Bits

WM8593 bảng dữ liệu(PDF) 52 Page - Wolfson Microelectronics plc

WM8593 bảng dữ liệu(HTML) 52 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98

bảng dữ liệu tải về

Link URL