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WM8581 bảng dữ liệu(PDF) 28 Page - Wolfson Microelectronics plc

tên linh kiện WM8581
Giải thích chi tiết về linh kiện  Multichannel CODEC with S/PDIF Transceiver
PDF  100 Pages
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nhà sản xuất  WOLFSON [Wolfson Microelectronics plc]
Trang chủ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8581 bảng dữ liệu(HTML) 28 Page - Wolfson Microelectronics plc

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WM8581
Production Data
w
PD Rev 4.0 April 2007
28
Figure 14 Left Justified Mode Timing Diagram
RIGHT JUSTIFIED MODE
In Right Justified mode, the LSB of input data is sampled on the rising edge of BCLK preceding a
LRCLK transition. The LSB of the output data changes on the falling edge of BCLK preceding a
LRCLK transition, and may be sampled on the next rising edge of BCLK. LRCLKs are high during the
left samples and low during the right samples.
Figure 15 Right Justified Mode Timing Diagram
I
2S MODE
In I2S mode, the MSB of DIN1/2/3/4 is sampled on the second rising edge of BCLK following a
LRCLK transition. The MSB of the output data changes on the first falling edge of BCLK following an
LRCLK transition, and may be sampled on the next rising edge of BCLK. LRCLKs are low during the
left samples and high during the right samples.
Figure 16 I
2S Mode Timing Diagram



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