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ES9033 bảng dữ liệu(PDF) 77 Page - ESS Technology,Inc

tên linh kiện ES9033
Giải thích chi tiết về linh kiện  32-bit High-Performance 2-Channel DAC with Line Drivers
PDF  103 Pages
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nhà sản xuất  ESS [ESS Technology,Inc]
Trang chủ  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9033 bảng dữ liệu(HTML) 77 Page - ESS Technology,Inc

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ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800
ES9033 Datasheet Information
77
Register 73: DRE FORCE
Bits
[7]
[6]
[5:0]
Default
1’b1
1’b1
6’b000011
Bits
Mnemonic
Description
[7]
DRE_FORCE_CH2
Force CH2 into DRE mode even if zero cross has not
occurred.
•
1’b0: DRE engages when signal is below DRE
threshold and a signal zero cross is detected(default).
•
1’b1: DRE engages when signal is below DRE
threshold and a signal zero cross is ignored.
[6]
DRE_FORCE_CH1
Force CH1 into DRE mode even if zero cross has not
occurred.
•
1’b0: DRE engages when signal is below DRE
threshold and a signal zero cross is detected(default).
•
1’b1: DRE engages when signal is below DRE
threshold and a signal zero cross is ignored.
[5:0]
RESERVED
NA
Register 75-74: DRE GAIN CH1
Bits
[15:0]
Default
16’h1A34
Bits
Mnemonic
Description
[15:0]
DRE_GAIN1
Sets the DRE gain for CH1. Shift right 1 bit corresponds to -
6dB.
•
16’h07FF (0dB): Minimum
•
16’h1A34 (16.33dB): Default
•
16’h7FFF (30dB): Maximum



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