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DSP56004ROM bảng dữ liệu(PDF) 12 Page - Freescale Semiconductor, Inc |
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DSP56004ROM bảng dữ liệu(HTML) 12 Page - Freescale Semiconductor, Inc |
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12 / 82 page ![]() 1-6 DSP56004/D, Rev. 3 MOTOROLA Signal/Connection Descriptions External Memory Interface (EMI) . MD0–MD7 Bidi- rectional Tri-stated Data Bus —These signals provide the bidirectional data bus for EMI accesses. They are inputs during reads from external memory, outputs during writes to external memory, and tri- stated if no external access is taking place. If the data bus width is defined as four bits wide, only signals MD0–MD3 are active, while signals MD4–MD7 remain tri-stated. While tri-stated, MD0–MD7 are disconnected from the pins and do not require external pull-ups. Table 1-6 EMI States during Reset and Stop States Signal Operating Mode Hardware Reset Software Reset Individual Reset Stop Mode MA0–MA14 Driven High Previous State Previous State Previous State MA15 MCS3 Driven High Driven High Driven High Driven High Previous State Driven High Previous State Driven High MA16 MCS2 MCAS: DRAM refresh disabled DRAM refresh enabled Driven High Driven High Driven High Driven High Driven High Driven High Driven High Driven High Previous State Driven High Driven High Driven Low Previous State Driven High Driven High Driven High MA17 MCS1 MRAS : DRAM refresh disabled DRAM refresh enabled Driven High Driven High Driven High Driven High Driven High Driven High Driven High Driven High Previous State Driven High Driven High Driven Low Previous State Driven High Driven High Driven High MCS0 Driven High Driven High Driven High Driven High MWR Driven High Driven High Driven High Driven High MRD Driven High Driven High Driven High Driven High Table 1-5 External Memory Interface (EMI) Signals (Continued) Signal Name Signal Type State during Reset Signal Description Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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