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UPD780921 bảng dữ liệu(PDF) 12 Page - Renesas Technology Corp

tên linh kiện UPD780921
Giải thích chi tiết về linh kiện  MOS INTEGRATED CIRCUIT
PDF  40 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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UPD780921 bảng dữ liệu(HTML) 12 Page - Renesas Technology Corp

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µPD780921, 780922, 780923, 780924
3.2 NON PORT PINS
INTP0
Input
External interrupt input that can specify the effective edge
Input
P00/TOFF7
INTP1
(rising edge, falling edge, or both rising and falling edges) can be
Input
P01
INTP2
specified.
Input
P02
INTP3
Input
P03/ADTRG
TI50
Input
External count clock input to timer (TM50).
Input
P24/TO50
TI51
External count clock input to timer (TM51).
Input
P25/TO51
TI52
External count clock input to timer (TM52).
Input
P26/TO52
TO50
Output
Timer (TM50) output.
Input
P24/TI50
TO51
Timer (TM51) output.
Input
P25/TI51
TO52
Timer (TM52) output.
Input
P26/TI52
RTP0 to RTP7 Output
Real-time output port that outputs pulses in synchronization with
Input
P30 to P37
trigger signals outputs from the real-time pulse unit.
TxD00
Output
Asynchronous serial interface serial data output.
Input
P21
TxD01
Input
P23
RxD00
Input
Asynchronous serial interface serial data input.
Input
P20
RxD01
Input
P22
ANI0 to ANI7 Input
A/D converter analog input.
Input
P10 to P17
ADTRG
Input
External trigger signal input to the A/D converter.
Input
P03/INTP3
TO70 to TO75 Output
Timer output for the 3-phase PWM inverter control.
Hi-Z
–
TOFF7
Input
Timer output (TO70 to TO75) stop interrupt input.
Input
P00/INTP0
AD0 to AD7
I/O
Lower address/data bus when memory is expanded externally.
Input
P40 to P47
A8 to A15
Output
Upper address bus when memory is expanded externally.
Input
P50 to P57
RD
Output
Strobe signal output for external memory read operation.
Input
P64
WR
Strobe signal output for external memory write operation.
Input
P65
WAIT
Input
Wait insertion when accessing external memory.
Input
P66
ASTB
Output
Strobe output that externally latches address information output
Input
P67
to ports 4 and 5 to access external memory.
AVREF
Input
A/D converter reference voltage input.
–
–
AVDD
–
A/D converter analog power supply. Connect to VDD0.–
–
AVSS
–
A/D converter ground potential. Connect to VSS0.–
–
RESET
Input
System reset input.
–
–
X1
Input
Crystal connection for system clock oscillation.
–
–
X2
–
––
VDD0
–
Positive power supply for ports.
–
–
VSS0
–
Ground potential for ports.
–
–
VDD1
–
Positive power supply except for ports.
–
–
VSS1
–
Ground potential except for ports.
–
–
TEST
–
Test mode set pin. Connect to VSS0 directly.
–
–
Pin Name
I/O
Function
After Reset
Alternate
Function



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