CS53L21 datasheet(47/66 Pages) CIRRUS

tên linh kiện	CS53L21

Giải thích chi tiết về linh kiện	Low Power, Stereo Analog to Digital Converter

PDF	66 Pages

Scroll/Zoom	100%

nhà sản xuất	CIRRUS [Cirrus Logic]

Trang chủ	http://www.cirrus.com

Logo

47 / 66 page

DS700PP1

CS53L21

6.7

ADCx Input Select, Invert & Mute (Address 07h)

ADCX Input Select Bits (AINX_MUX[1:0])

Default: 00

Function:

Selects the specified analog input signal into ADCx. The microphone pre-amplifier is only available when

PDN_PGAx is disabled. See Figure 21.

ADCX Invert Signal Polarity (INV_ADCX)

Default: 0

0 - Disabled

1 - Enabled

Function:

When enabled, this bit will invert the signal polarity of the ADC x channel.

ADCX Channel Mute (ADCX_MUTE)

Default: 0

0 - Disabled

1 - Enabled

Function:

The output of channel x ADC will mute when enabled. The muting function is affected by the ADCx Soft bit

(SOFT).

432

AINB_MUX1

AINB_MUX0

AINA_MUX1

AINA_MUX0

INV_ADCB

INV_ADCA

ADCB_MUTE ADCA_MUTE

PDN_PGAx AINx_MUX[1:0]

Selected Path to ADC

AIN1x-->PGAx

AIN2x-->PGAx

AIN3x/MICINx-->PGAx

AIN3x/MICINx-->Pre-Amp(+16/+32 dB Gain)-->PGAx

100

AIN1x

101

AIN2x

AIN3x/MICINx

Reserved

MUX

AIN1x

AIN2x

AIN3x / MICINx

PGA

+16/

32 dB

MUX

AINx_MUX[1:0]

PDN_PGAx

AIN1x

AIN2x

AIN3x

Decoder

ADC

Figure 21. AIN & PGA Selection

CS53L21 bảng dữ liệu(PDF) 47 Page - Cirrus Logic

CS53L21 bảng dữ liệu(HTML) 47 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

bảng dữ liệu tải về

Link URL