P87LPC778FDH datasheet(37/79 Pages) PHILIPS

37 / 79 page

Philips Semiconductors

P87LPC778

CMOS single-chip 8-bit microcontroller

Product data

Rev. 01 — 31 March 2004

37 of 79

9397 750 12378

The value of port pins at reset is determined by the PRHI bit in the UCFG1 register.

Ports may be conﬁgured to reset high or low as needed for the application. When port

pins are driven high at reset, they are in quasi-bidirectional mode and therefore do

not source large amounts of current.

Every output on the P87LPC778 may potentially be used as a 20 mA sink LED drive

output. However, there is a maximum total output current for all ports which must not

be exceeded.

All ports pins of the P87LPC778 have slew rate controlled outputs. This is to limit

noise generated by quickly switching output signals. The slew rate is factory set to

approximately 10 ns rise and fall times.

The bits in the P2M1 register that are not used to control conﬁguration of P2.1 and

P2.0 are used for other purposes. These bits can enable Schmitt trigger inputs on

each I/O port, enable toggle outputs from Timer 0 and Timer 1, and enable a clock

output if either the internal RC oscillator or external clock input is being used. The last

two functions are described in Section 8.14 “Timer/counters” on page 46 and Section

8.10 “Oscillator” on page 39 respectively. The enable bits for all of these functions are

shown in Tables 33 and 34.

Each I/O port of the P87LPC778 may be selected to use TTL level inputs or Schmitt

inputs with hysteresis. A single conﬁguration bit determines this selection for the

entire port. Port pins P1.2, P1.3, and P1.5 always have a Schmitt trigger input.

Table 33:

P2M1 - Port 2 mode register 1 (address A4h) bit allocation

Not bit addressable; Reset value: 00H

Bit

Symbol

P2S

P1S

P0S

ENCLK

ENT1

ENT0

(P2M1.1)

(P2M1.0)

Table 34:

P2M1 - Port 2 mode register 1 (address A4h) bit description

Bit

Symbol

Description

P2S

When P2S = 1, this bit enables Schmitt trigger inputs on Port 2.

P1S

When P1S = 1, this bit enables Schmitt trigger inputs on Port 1.

P0S

When P0S = 1, this bit enables Schmitt trigger inputs on Port 0.

ENCLK

When ENCLK is set and the P87LPC778 is conﬁgured to use the

on-chip RC oscillator, a clock output is enabled on the X2 pin

(P2.0). Refer to Section 8.10 “Oscillator” on page 39 for details.

ENT1

When set, the P.7 pin is toggled whenever Timer1 overﬂows. The

output frequency is therefore one half of the Timer1 overﬂow rate.

Refer to Section 8.14 “Timer/counters” on page 46 for details.

ENT0

When set, the P1.2 pin is toggled whenever Timer0 overﬂows. The

output frequency is therefore one half of the Timer0 overﬂow rate.

Refer to Section 8.14 “Timer/counters” on page 46 for details.

1, 0

These bits, along with the matching bits in the P2M2 register,

control the output conﬁguration of P2.1 and P2.0 respectively, as

shown in Table 32.

P87LPC778FDH bảng dữ liệu(PDF) 37 Page - NXP Semiconductors

P87LPC778FDH bảng dữ liệu(HTML) 37 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

bảng dữ liệu tải về

Link URL