MC68340 datasheet(210/441 Pages) FREESCALE

210 / 441 page

MOTOROLA

MC68340 USER’S MANUAL

5- 73

DSCLK, the gated serial clock, is normally high, but it pulses low for each bit to be

transferred. At the end of the seventeenth clock period, it remains high until the start of the

next transmission. Clock frequency is implementation dependent and may range from DC

to the maximum specified frequency. Although performance considerations might dictate a

hardware implementation, software solutions can be used provided serial bus timing is

maintained.

5.6.2.8 COMMAND SET. The following paragraphs describe the command set available in

BDM.

5.6.2.8.1 Command Format. The following standard bit format is utilized by all BDM

commands.

98765432

OPERATION

R/W

OP SIZE

A/D

EXTENSION WORD(S)

Bits 15–0—Operation Field

The operation field specifies the commands. This 6-bit field provides for a maximum of

64 unique commands.

R/W Field

The R/W field specifies the direction of operand transfer. When the bit is set, the

transfer is from CPU to development system. When the bit is cleared, data is written to

the CPU or to memory from the development system.

Operand Size

For sized operations, this field specifies the operand data size. All addresses are

expressed as 32-bit absolute values. The size field is encoded as listed in Table 5-22.

Table 5-22. Size Field Encoding

Encoding

Operand Size

Byte

Word

Long

Reserved

Address/Data (A/D) Field

The A/D field is used by commands that operate on address and data registers. It

determines whether the register field specifies a data or address register. One indicates

an address register; zero indicates a data register. For other commands, this field may

be interpreted differently.

Freescale Semiconductor, Inc.

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