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ST7789V2 bảng dữ liệu(PDF) 116 Page - Sitronix Technology Co., Ltd. |
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ST7789V2 bảng dữ liệu(HTML) 116 Page - Sitronix Technology Co., Ltd. |
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116 / 319 page ![]() ST7789V2 Version 1.0 Page 116 of 319 2016/11 Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Sitronix. In with ram mode, hpw+hbp+hfp ≧22 In without ram mode, hpw+hbp ≧20 6bit RGB interface: Parameter Symbol Min. Typ. Max. Unit Horizontal Sync. Width hpw 6 30 hpw+hbp=93 Clock Horizontal Sync. Back Porch hbp 12 30 Clock Horizontal Sync. Front Porch hfp 6 60 - Clock Vertical Sync. Width vs 2 4 vs+vbp=127 Line Vertical Sync. Back Porch vbp 2 4 Line Vertical Sync. Front Porch vfp 2 8 - Line Note: Typical value are related to the setting of dot clock is 17MHz and frame rate is 60Hz, VDD=VDDI=2.8V.. In with ram mode, hpw+hbp+hfp ≧66 In without ram mode, hpw+hbp ≧60 8.9.4 RGB Interface Mode Selection ST7789V2 supports two kinds of RGB interface, DE mode and HV mode. Each mode also can select with ram and without ram. The table shown below uses command B1h to select RGB interface mode. RCM[1:0] WO RGB Mode Data Path 10 0 DE mode Ram 1 Shift register (without Ram) 11 0 HV mode Ram 1 Shift register (without Ram) 8.9.5 RGB Interface Timing The timing chart of RGB interface DE mode is shown as follows. |
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