ST7789V2 datasheet(56/319 Pages) SITRONIX

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ST7789V2

Version 1.0

Page 56 of 319

2016/11

Sitronix Confidential

The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or

disclosed in whole or in part without prior written permission of Sitronix.

DCX

Clock signal

SDA

Serial input data

SDO

Serial output data

Table 14 pin description of serial interface

8.4.2

Command write mode

The write mode of the interface means the micro controller writes commands and data to the LCD driver.

3-lines serial data packet contains a control bit D/CX and a transmission byte. In 4-lines serial interface, data

packet contains just transmission byte and control bit D/CX is transferred by the D/CX pin. If D/CX is “low”, the

transmission byte is interpreted as a command byte. If D/CX is “high”, the transmission byte is stored in the

display data RAM (memory write command), or command register as parameter.

Any instruction can be sent in any order to the driver. The MSB is transmitted first. The serial interface is

initialized when CSX is high. In this state, SCL clock pulse or SDA data have no effect. A falling edge on CSX

enables the serial interface and indicates the start of data transmission.

Figure 12 Serial interface data stream format

When CSX is “high”, SCL clock is ignored. During the high period of CSX the serial interface is initialized.

At the falling edge of CSX, SCL can be high or low. SDA is sampled at the rising edge of SCL. D/CX indicates

whether the byte is command (D/CX=’0’) or parameter/RAM data (D/CX=’1’). D/CX is sampled when first

rising edge of SCL (3-line serial interface) or 8th rising edge of SCL (4-line serial interface). If CSX stays low

after the last bit of command/data byte, the serial interface expects the D/CX bit (3-line serial interface) or D7

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