ST7789V2 datasheet(36/319 Pages) SITRONIX

36 / 319 page

ST7789V2

Version 1.0

Page 36 of 319

2016/11

Sitronix Confidential

The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or

disclosed in whole or in part without prior written permission of Sitronix.

6.3

Driver Output Pins

Name

I/O

Description

Connect pin

S1 to S720

-Source driver output pad.

LCD

G1 to G320

-Gate driver output pad.

VGH: Selecting Gate Lines Level.

VGL: Non-selecting Gate Lines Level.

LCD

AVDD

-Power pad for analog circuit.

OPEN

VAP(GVDD)

- A power output of grayscale voltage generator.

OPEN

AVCL

- A power supply pin for generating VAN.

OPEN

VAN(GVCL)

- A power output (Negative) of grayscale voltage generator.

OPEN

VGH

- Power output pin for gate driver

OPEN

VGL

- Power output (Negative) pin for gate driver

OPEN

VCC

- Monitoring pin of internal digital reference voltage.

OPEN

VCOM

- A power supply for the TFT-LCD common electrode.

GND

LED_PWM

-Output pad for PWM output signal to driving LED.

-If not used, keep it open.

LED_EN

-Output pad for enabling LED.

-If not used, keep it open.

6.4

Test and other pins

TEST3~TEST0

Input pins for testing.

Please open these pins.

OPEN

TE2

Output pin for testing.

Please keep this pin floating.

OPEN

TESTO6~TESTO1

Output pins for testing.

Please keep these pins floating.

OPEN

DUMMY

These pins are dummy (no electrical characteristic)

Can pass signal through these pads on TFT panel.

Please open these pins.

OPEN

DUMMYR1

DUMMYR2

These pins are dummy (no electrical characteristic).

DUMMYR1 and DUMMYR2 are connected each other internally.

OPEN

VAG

VDDS

VDDGX

V20

Used for monitoring

Please keep these pins floating.

OPEN

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