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STM32L151C6U6ADTR bảng dữ liệu(PDF) 88 Page - STMicroelectronics

tên linh kiện STM32L151C6U6ADTR
Giải thích chi tiết về linh kiện  Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3,128KB Flash, 32KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC
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STM32L151C6U6ADTR bảng dữ liệu(HTML) 88 Page - STMicroelectronics

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Electrical characteristics
STM32L151x6/8/B-A STM32L152x6/8/B-A
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DocID024330 Rev 5
Figure 20. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets. 0.1 uF capacitor must be placed as close as
possible to the chip.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 46. Otherwise the reset will not be taken into account by the device.
6.3.15
TIM timer characteristics
The parameters given in Table 47 are guaranteed by design.
Refer to Section 6.3.13: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
Table 47. TIMx(1) characteristics
1. TIMx is used as a general term to refer to the TIM2, TIM3 and TIM4 timers.
Symbol
Parameter
Conditions
Min
Max
Unit
tres(TIM)
Timer resolution time
-1
-
tTIMxCLK
fTIMxCLK = 32 MHz 31.25
-
ns
fEXT
Timer external clock
frequency on CH1 to CH4
-0
fTIMxCLK/2
MHz
fTIMxCLK = 32 MHz
0
16
MHz
ResTIM
Timer resolution
-
-
16
bit
tCOUNTER
16-bit counter clock
period when internal clock
is selected (timer’s
prescaler disabled)
-
1
65536
tTIMxCLK
fTIMxCLK = 32 MHz 0.0312
2048
µs
tMAX_COUNT Maximum possible count
-
-
65536 × 65536
tTIMxCLK
fTIMxCLK = 32 MHz
-
134.2
s



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