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DA7218 bảng dữ liệu(PDF) 57 Page - Renesas Technology Corp |
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DA7218 bảng dữ liệu(HTML) 57 Page - Renesas Technology Corp |
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57 / 198 page ![]() DA7218 Ultra-Low Power Stereo Codec Datasheet Revision 3.4 24-Dec-2021 CFR0011-120-00 57 of 197 © 2021 Renesas Electronics 9.4.6 Charge Pump Control The charge pump is enabled by asserting cp_en in the CP_CTRL register. Once enabled, the charge pump can be controlled manually or automatically. When under manual control (cp_mchange = 00), the output voltage level is directly determined by cp_mod. The amount of charge stored, and therefore the voltage generated, by the charge pump is controlled by the charge pump controller. As the power consumed by devices such as amplifiers is proportional to v oltage, significant power savings are available by matching the charge pump’s output with the system’s power requirement. Under automatic control, there are three modes of operation that are determined by the cp_mchange setting. All four modes (one manual and three automatic) are described in Table 43. Table 43: Charge Pump Output Voltage Control Charge Pump Tracking Mode cp_mchange Charge Pump Output Voltage Details 00 Manual The charge pump’s output voltage is determined by the settings of cp_mod 01 Voltage level depends on the programmed gain setting The charge pump controller monitors the PGA volume settings and generates the minimum voltage that is required to drive a full-scale signal at the current gain level 10 Voltage level depends on the DAC signal envelope The charge pump controller monitors the DAC signal, and generates the voltage that is required to drive a full-scale output at the current DAC signal volume level 11 Voltage level depends on the signal magnitude and the programmed gain setting The charge pump monitors both the programmed volume settings and the actual signal size, and generates the appropriate output voltage This is the most power-efficient mode of operation When cp_mchange is set to 10 (tracking DAC signal size, described in Table 43) or cp_mchange is set to 11 (tracking the output signal size), the charge pump switches its supply between the VDD rail and the VDD/2 rail depending on its power requirements. When low output voltages are needed, the charge pump saves power by using the lower-voltage VDD/2 rail. The switching point between using the VDD rail and the VDD/2 rail is determined by the cp_thresh_vdd2 register setting. The switching points determined by cp_thresh_vdd2 vary between the two cp_mchange modes, and are summarized Table 44 and Table 45. Table 44: cp_thresh_vdd2 Settings in DAC Signal Tracking Mode (cp_mchange = 10) cp_thresh_vdd2 Setting Approximate Switching Point Notes 0x01 -30 dBFS Do not use. Very power-inefficient as nearly always VDD/1 0x03 -24 dBFS Not recommended. Very power-inefficient as nearly always VDD/1 0x07 -18 dBFS May be used but not power efficient 0x0E -12 dBFS May be used 0x10 -10 dBFS Recommended setting 0x3F to 0x13 Reserved, do not use |
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