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DA9062 bảng dữ liệu(PDF) 49 Page - Renesas Technology Corp |
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DA9062 bảng dữ liệu(HTML) 49 Page - Renesas Technology Corp |
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49 / 101 page ![]() DA9062 PMIC for Applications Requiring up to 8.5 A Datasheet Revision 3.8 15-Feb-2022 CFR0011-120-00 49 of 99 © 2022 Renesas Electronics Current State LS GPI SYS_EN PWR_EN Freeze Note 1 Next State SYSTEM 0 0 x x POWERDOWN SYSTEM x 1 0 x SYSTEM SYSTEM x 1 1 x ACTIVE SYSTEM 1 x 0 x SYSTEM SYSTEM 1 x 1 x ACTIVE ACTIVE 0 0 x x POWERDOWN ACTIVE x 1 0 x SYSTEM ACTIVE x 1 1 x ACTIVE ACTIVE 1 x 0 x SYSTEM ACTIVE 1 x 1 x ACTIVE Note 1 In this table, Freeze represents the result of the comparison retry count = 0. The following events will reset the retry counter and release the state machine from the freeze state: ● De-assertion of all blocked level-sensitive wakeup conditions ● Entry to the RESET mode (over-temperature error, nRESETREQ or long press of nONKEY) ● Entry to the RTC mode (system supply error) The freeze operation is illustrated in Figure 22. Once the freeze state is cleared, DA9062 continues operating normally. The freeze function can be enabled in the FREEZE_EN register and the number of retries triggering the freeze can be configured in NFREEZE. Power mode ACTIVE POWERDOWN ACTIVE TWD_ERROR GPI 1 NFREEZE The watchdog expires The level sensitive wake-up condition is blocked The level sensitive wake-up condition is de-asserted which resets the retry count The retry count is decremented and reaches zero The system operates normally upon the next wake-up event Retry count 0 Figure 22: Freeze Function 8.8.5 Power-Up, Power-Down, and Shutdown Sequences The power-up, power-down, and shutdown sequences, see Figure 21, are handled by the power supply sequencer, see Section 8.9. All power-up sequences are identical, and the power-down sequences mirror the power-up sequences. The shutdown sequences are also identical to the power-down sequence, but after reaching POWERDOWN mode, the state machine automatically proceeds to RESET mode. The shutdown sequences caused by an internal error or nRESETREQ can be sped up from the INT_SD_MODE and HOST_SD_MODE controls: see Section 8.8.3. |
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