VL53L8CXV0GCSLASH1 datasheet(17/42 Pages) STMICROELECTRONICS

tên linh kiện	VL53L8CXV0GC/1

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4.2

SPI read messages

The master sends the read command to the VL53L8CX. The master then provides a clock to output the status.

In read mode, the slave writes the data to the master. Transmission is ended by the master. The reading

sequence starts with the first value of the MOSI equal to 0. The most significant bit is sent first (big-endian

format). Once the last bit of the address has been received, the device fetches the data internally. The device

then presents the data onto the MOSI pin by the next falling MCLK edge (half the MCLK period). This enables

the host to sample the data on the following rising edge. Once 8 bits of data have been received, the host sets

the NCS high. This terminates the process. More details of the SPI read timing are shown in Figure 19. SPI read

timing.

Figure 19. SPI read timing

If the host continues to toggle the MCLK after the last data bit has been read, the slave goes into auto-increment

read mode. In this mode, the address is automatically incremented by the slave, and the read data are

transmitted sequentially to the master on the MISO line. More details of the SPI auto-increment read mode

are shown in Figure 20. SPI auto-increment read sequence.

Figure 20. SPI auto-increment read sequence

VL53L8CX

SPI read messages

DS14161 - Rev 2

page 17/42

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