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STM32U595AI bảng dữ liệu(PDF) 268 Page - STMicroelectronics

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STM32U595AI bảng dữ liệu(HTML) 268 Page - STMicroelectronics

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Electrical characteristics
STM32U59xxx
268/377
DS13633 Rev 1
5.3.15
NRST pin characteristics
The NRST pin input driver uses the CMOS technology. It is connected to a permanent
pull-up resistor, RPU.
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the ambient temperature and supply voltage conditions summarized
in Table 32.
Figure 36. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in the above table.
Otherwise the reset is not taken into account by the device.
3. The external capacitor on NRST must be placed as close as possible to the device.
Table 91. NRST pin characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST) NRST input low-level voltage
-
-
-
0.3 × VDDIOx
V
VIH(NRST) NRST input high-level voltage
-
0.7 × VDDIOx
--
Vhys(NRST)
NRST Schmitt trigger voltage
hysteresis
--
200
-
mV
RPU
Weak pull-up equivalent resistor(2)
VIN = VSS
30
40
50
kΩ
tF(NRST)
NRST input filtered pulse
-
-
-
50
ns
tNF(NRST) NRST input not-filtered pulse
1.71 V ≤ VDD ≤ 3.6 V
330
-
-
1.58 V ≤ VDD ≤ 3.6 V
1000
-
-
1.
Specified by design. Not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance is minimal (~10% order)
.
MS19878V3
RPU
VDD
Internal reset
External
reset circuit
(1)
NRST
(2)
Filter
0.1 μF



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