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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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STM32U595AI bảng dữ liệu(PDF) 49 Page - STMicroelectronics |
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STM32U595AI bảng dữ liệu(HTML) 49 Page - STMicroelectronics |
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49 / 377 page  DS13633 Rev 1 49/377 STM32U59xxx Functional overview 94 • Peripheral clock sources: several peripherals have their own independent clock whatever the system clock. Three PLLs, each having three independent outputs allowing the highest flexibility, can generate independent clocks for the ADC, USB, SDMMC, RNG, MDF, ADF, FDCAN1, OCTOSPIs, HSPI, LTDC, DSI and SAIs. • Startup clock: after reset, the microcontroller restarts by default with MSI. The prescaler ratio and clock source can be changed by the application program as soon as the code execution starts. • CSS (clock security system): this feature can be enabled by software. If a HSE clock failure occurs, the master clock automatically switches to HSI16 and a software interrupt is generated if enabled. LSE failure can also be detected and generates an interrupt. • Clock-out capability: – MCO (microcontroller clock output): it outputs one of the internal clocks for external use by the application. – LSCO (low-speed clock output): it outputs LSI or LSE in all low-power modes (except VBAT mode). Several prescalers allow AHB and APB frequencies configuration. The maximum frequency of the AHB and the APB clock domains is 160 MHz. |
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