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STM32U595AI bảng dữ liệu(PDF) 155 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32U595AI bảng dữ liệu(HTML) 155 Page - STMicroelectronics

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2. PC13, PC14, and PC15 are supplied through the power switch (by VSW). Since the switch only sinks a limited amount of current (3 mA), the use of PC13 to PC15 GPIOs
in output mode is limited:
- The speed must not exceed 2 MHz with a maximum load of 30 pF.
- These GPIOs must not be used as current sources (for example to drive a LED).
3. After a backup domain power-up, PC13, PC14, and PC15 operate as GPIOs. Their function depends then on the content of the RTC registers that are not reset by the
system reset. For details on how to manage these GPIOs, refer to the backup domain and RTC register descriptions in the product reference manual.
4. After reset, a pull-down resistor (Rd = 5.1 kΩ from UCPD peripheral) can be activated on PA15 and PB15 (UCPD1_CC1, UCPD1_CC2). The pull-down on PA15
(UCPD1_CC1) is activated by high level on PB5 (UCPD1_DBCC1). The pull-down on PB15 (UCPD1_CC2) is activated by high level on PB14 (UCPD1_DBCC2).
This pull-down control (dead battery support on UCPD) can be disabled by setting UCPD_DBDIS = 1 in the PWR_UCPDR register.
5. GPIO is 5V-tolerant when the USB PHY is powered on.
6. After reset, this pin is configured as JTAG/SWD alternate functions. The internal pull-up on PA15, PA13, PB4 pins and the internal pull-down on PA14 pin are activated.



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