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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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HC705V8GRS/D bảng dữ liệu(PDF) 34 Page - NXP Semiconductors |
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HC705V8GRS/D bảng dữ liệu(HTML) 34 Page - NXP Semiconductors |
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34 / 172 page  SECTION 3: EPROM AND EEPROM Page 23 MC68HC705V8 Specification Rev. 2.1 SECTION 3 EPROM AND EEPROM The MC68HC705V8 contains EPROM and EEPROM Memory. This section describes the programming mechanisms for each type of memory. 3.1 EPROM BOOTLOADER Bootloader Programming Mode is entered upon the rising edge of RESET if the IRQ pin is at VTST and the PB7 pin is at logic one. The Bootloader code resides in the ROM from $3C00 to $3FEF. This program handles copying of user code from an external EPROM into the on-chip EPROM. The user code must be a one-to-one correspondence with the internal EPROM addresses. 3.1.1 BOOTLOADER FUNCTIONS Three pins are used to select various bootloader functions. These pins are PC2, PC1 and PC0. PC3 and PC4 are tied to logic zero. Two other pins, PC7 and PC6 are used to drive the PROG LED and the VERF LED respectively. The programming modes are shown in Table 3-1. Table 3-1: Bootloader Functions 3.2 EPROM PROGRAMMING The EPROM array is programmed through manipulation of the Programming Register located at $000D. It maybe programmed in user, bootstrap or test mode. The schematic of the EPROM programmer using the bootstrap firmware is shown in Figure 3-1. In addition to the main EPROM array, the Mask Option Register must also be programmed appropriately by the programming software. PC2 PC1 PC0 MODE 0 0 0 Program/Verify EPROM 0 0 1 Verify Only 0 1 0 Factory use 0 1 1 Jump to top of EEPROM 1 0 0 Jump to top of RAM 1 0 1 Jump to top of EPROM Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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