ST20-GP6 datasheet(75/123 Pages) STMICROELECTRONICS

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ST20-GP6

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14 Diagnostic controller

The ST20 Diagnostic Controller Unit (DCU) provides a means for booting the CPU, and for the con-

trol and monitoring of all systems on the chip, via the standard IEEE 1194.1 Test Access Port. The

Test Access Port is described in Chapter 23. The DCU includes on-chip hardware with ICE (In Cir-

cuit Emulation) and LSA (Logic State Analyzer) features to facilitate veriﬁcation and debugging of

software running on the on-chip CPU in real time. It is an independent hardware module with a pri-

vate link from the host to support real-time diagnostics.

14.1 Diagnostic hardware

The on-chip diagnostic controller assists in debugging, while reducing or eliminating the intrusion

into the target code space, the CPU utilization, and impact on the application. As shown in

Figure 14.1, the DCU and TAP provide a means of connecting a diagnostic host to a target board

with a suitable JTAG port connector and interface.

Figure 14.1 Debugging hardware

The diagnostic controller provides the following facilities for debugging from a host:

•

control of target CPU and subsystems including CPU boot;

•

hardware breakpoint, watchpoint, datawatch and single instruction step;

•

complex trigger sequencing and choice of subsequent actions;

•

non-intrusive jump trace and instruction pointer proﬁling;

•

access to the memory of the target while the device is powered up, regardless of the state

of the CPU;

•

full debugging of ROM code.

When running multi-tasking code on the target, one or more processes can be single-stepped or

stopped while others continue running in real time. In this case, the running threads can be inter-

rupted by incoming hardware interrupts, with a low latency.

Host

interface

Test

access

port

Diagnostic

controller

ST20

Logic

state

analyzer

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