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EM6620WS27 bảng dữ liệu(PDF) 14 Page - EM Microelectronic - MARIN SA |
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EM6620WS27 bảng dữ liệu(HTML) 14 Page - EM Microelectronic - MARIN SA |
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14 / 56 page ![]() R EM6620 Copyright © 2005, EM Microelectronic-Marin SA 14 www.emmicroelectronic.com 6.2 Port A The EM6620 has one four bit general purpose CMOS input port. The port A input can be read at any time, pull- up or pull-down resistors can be chosen. All selections concerning port A are bit-wise executable. I.e. Pull-up on PA[2], pull-down on PA[0], positive IRQ edge on PA[0] but negative on PA[1], etc. In sleep mode the port A inputs are continuously monitored to match the input reset condition which will immediately wake up the EM6620. The pull-up or pull-down resistors remain active as defined in the option register. Figure 10. Input Port A Configuration IntEdgPA[n]=0 NoDebIntPA[n]=1 Mask opt MPAPU[n] PA3 for the Millisecond Counter IRQPA[3:0] PA[n]terminal PA0, PA3 for 10-bit Counter Mask opt MPAPD[n] Debouncer µP TestVar Ck[8] Ck[11] or Ck[14] DB[3:0] NoPull[n] VBAT (VDD ) VSS 6.2.1 IRQ on Port A For interrupt request generation (IRQ) one can choose direct or debounced input and positive or negative edge IRQ triggering. With the debouncer selected ( OPtDebIntPA ) the input must be stable for two rising edges of the selected debouncer clock (RegPresc). This means a worst case of 16ms(default) or 2ms (0.25ms by metal mask) with a system clock of 32kHz. Either a positive or a negative edge on the port A inputs - after debouncer or not - can generate an interrupt request. This selection is done in the option register OPTIntEdgPA. All four bits of port A can provide an IRQ, each pin with its own interrupt mask bit in the RegIRQMask1 register. When an IRQ occurs, inspection of the RegIRQ1, RegIRQ2 and RegIRQ3 registers allow the interrupt to be identified and treated. At power on or after any reset the RegIRQMask1 is set to 0, thus disabling any input interrupt. A new interrupt is only stored with the next active edge after the corresponding interrupt mask is cleared. See also the interrupt chapter 9. It is recommended to mask the port A IRQ’s while one changes the selected IRQ edge. Else one may generate a IRQ (Software IRQ). I.e. PA[0] on ‘0’ then changing from positive to negative edge selection on PA[0] will immediately trigger an IRQPA[0] if the IRQ was not masked. |
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