Philips Semiconductors

Product specification

74F373/74F374

Latch/flip-flop

December 5, 1994

8

AC WAVEFORMS (Continued)

The shaded areas indicate when the input is permitted to change for

predictable output performance.

VM

VM

VM

VM

VM

VM

tsu(L)

th(L)

tsu(H)

th(H)

CP

Dn

SF00262

Waveform 5. Data setup time and hold times

Qn, Qn

VM

VM

VM

tPHZ

tPZH

OEn

VOH -0.3V

0V

SF00263

Waveform 6. 3-State output enable time to high level

and output disable time from high level

VM

VM

VM

tPLZ

tPZL

VOL +0.3V

OEn

Qn, Qn

SF00264

Waveform 7. 3-State output enable time to low level

and output disable time from low level

TEST CIRCUIT AND WAVEFORMS

tw

90%

VM

10%

90%

VM

10%

90%

VM

10%

90%

VM

10%

NEGATIVE

POSITIVE

tw

AMP (V)

0V

0V

tTHL (tf )

INPUT PULSE REQUIREMENTS

rep. rate

1MHz

500ns 2.5ns

2.5ns

Input pulse definition

VCC

family

74F

D.U.T.

GENERATOR

RL

CL

RT

VIN

VOUT

Test circuit for 3-state outputs

tTHL (tf )

tTLH (tr )

tTLH (tr )

AMP (V)

amplitude

3.0V

1.5V

RL

7.0V

SWITCH POSITION

TEST

SWITCH

closed

open

All other

DEFINITIONS:

Load resistor; see AC electrical characteristics for value.

Load capacitance includes jig and probe capacitance;

see AC electrical characteristics for value.

generators.

SF00265

PULSE

PULSE

PULSE