TDA7803A-QLX datasheet(36/72 Pages) STMICROELECTRONICS

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Functional description

TDA7803A

36/72

DS12195 Rev 7

under a threshold that depends on the Vs level, the switch will short the corresponding

output to the common bar in such a way that it can exchange current with the other channel.

The dissipation reduction can be up to 50% compared to standard AB class.

The TDA7803A sets the high efficiency mode by default, but it can be changed through the

bits IB0 D3, D2, D1 and D0.

6.11

High power and parallel mode configuration

The TDA7803A is able to support high power applications thanks to its characteristics.

Whenever a higher output power with low impedance loads is needed (i.e. 2ohm load), it is

recommended to enable the current capability enhancer through the IB5[4:1] register.

When needed, the TDA7803A can also support the parallel mode configuration. The

functionality is allowed since the two output powers gates (master and slave) are shorted

together and only one of the two drivers is effectively working (the master). At the same time

the outputs are shorted on the application in such a way to minimize the resistive path.

The I2C bits IB6-d2,d3 are reserved for this function, as it follows:

Bits (D3, D2):



"00" single channel mode configuration for all channels;



"01" (ch1 and ch2): parallel mode configuration, (ch3 and ch4): single channel mode

configuration;



"10" (ch1 and ch2): single channel mode configuration, (ch3 and ch4): parallel mode

configuration;



"11" all channels set in parallel mode configuration.

The master channels are channel 1 when ch1 and ch2 are configured in parallel mode, and

channel 3 when ch3 and ch4 are configured in parallel mode.

6.12

Power on reset threshold

When VCC is lower than 4 V the integrity of I2C registers content is not guaranteed. In this

case the I2C registers are reset and the TDA7803A is put in Eco-mode state. This event is

communicated with a "0" on DB0-d7 I2C bit.

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