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TDA7803A-QLX bảng dữ liệu(PDF) 34 Page - STMicroelectronics |
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TDA7803A-QLX bảng dữ liệu(HTML) 34 Page - STMicroelectronics |
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34 / 72 page ![]() Functional description TDA7803A 34/72 DS12195 Rev 7 6.9 Mute management The transition Mute → Play can happen once the device is in amplifier mode and IB2- D3/D4 = "1" or after it has been put in mute for one of the causes listed in Table 9. It is done by means of a digital ramp whose time constant is programmable by IB2 D7, D6 and D5 bits. The transition Play → Mute occurs when certain conditions are verified and it can be Digital or Analog. An overview of all the events that might happen is reported in the Table 9. 8 V 01101011 9 V 01111001 10 V 10000110 11 V 10010100 12 V 10100010 13 V 10101111 14 V 10111101 14.4 V 11000010 15 V 11001011 16 V 11011001 17 V 11100110 18 V 11110100 19 V 11111111 Table 8. VCC value express by 8 bit with thermometric code (continued) VCC ADC value Table 9. Transition play to mute strategy Cause of transition Play → Mute When it happens Analog Digital I2C instruction When bit IB2 D4,D3 = “0” (Mute command) No Yes Timing for transition is fixed by IB2 D7, D6, D5 Low battery mute When there is a battery dip and the Vs goes below the auto mute threshold (selectable by IB2 D1) Yes IB2-D2 = 0: Yes IB2-D2 = 1: Disable If digital mute is enabled, timing for transition is fixed by IB2 D7-D6-D5 High battery mute When Vs ramp up above 19V Yes No PLL un-lock The PLL lock detector goes down for some reason Yes Not possible because in case of un-lock, digital core is reset so not working Thermal mute When Tw1 is “1” Yes Disabled Tristate command No Yes Timing for transition is fixed by IB2-D7, D6, D5 |
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