SPSB081 datasheet(34/135 Pages) STMICROELECTRONICS

34 / 135 page

•

The overvoltage bit VS_OV (SR2) is set and can be cleared with a ‘Read&Clear’ command. The overvoltage

bit is reset automatically if VS_LOCK_EN (CR3) = 0 and the overvoltage condition has recovered.

Vs undervoltage

If the supply voltage Vs drops below the under voltage threshold voltage (VSUV):

•

LIN remains enabled

•

CAN remains enabled

Note:

The functionality is not guaranteed in the range VPOR < VSREG < VSREGUV

•

OUT1, OUT2, OUT3, and OUT4 are turned off (default). The shutdown of outputs may be disabled by SPI

(VS_UV_SD_EN (CR3) =0)

•

Recovery of outputs after under-voltage condition is configurable by SPI:

–

VS_LOCK_EN (CR3)= 1: Outputs are off until Read&Clear VS_UV (SR2)

–

VS_LOCK_EN (CR3)= 0: Outputs turned on automatically after Vs undervoltage condition has

recovered.

•

The undervoltage bit (VSUV) is set and can be cleared with a ‘read and clear’ command. The undervoltage

bit is removed automatically if VS_ LOCK_EN = 0 and the undervoltage condition has recovered.

3.13.2

Vsreg supply failure

Vsreg overvoltage

If the supply voltages Vsreg reaches the overvoltage threshold VSREGOV:

•

LIN is switched to high impedance (RX is still on)

•

CAN remains enabled

•

The over voltage bit VSREG_OV (SR2) is set and can be cleared with a ‘Read&Clear’ command. The

overvoltage bit is reset automatically if VSREG_ LOCK_EN (CR3) = 0 and the overvoltage condition has

recovered.

Vsreg undervoltage

If the supply voltage Vsreg drops below the under voltage threshold voltage (VSREG_UV):

•

LIN is switched to high impedance (RX is still on).

Note:

The functionality is not guaranteed in the range VPOR < VSREG < VSREGUV

•

CAN remains enabled

•

The undervoltage bit (VSREG_UV (SR2) is set and can be cleared with a ‘Read&Clear’ command. The

undervoltage bit is removed automatically if VSREG_LOCK_EN (CR3) = 0 and the undervoltage condition

has recovered.

SPSB081

Power supply fail

DS14048 - Rev 1

page 34/135

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