DocID025372 Rev 3

3/17

RHFLVDSR2D2

Functional description and pin configuration

17

1

Functional description and pin configuration

Figure 1. Functional diagram and pinout

Note:

Vid = (VIN+) - (VIN-),

L = low level, H = high Level, X = don’t care, Z = high impedance (off)

Receiver

RIN1+

RIN1-

REN1

RIN2+

RIN2-

REN2

DIN1

DEN1

DIN2

DEN2

Receiver

ROUT1

ROUT2

DOUT1+

DOUT1-

DOUT2+

DOUT2-

Driver

Driver

8

11

14

13

12

10

1

2

3

4

5

6

7

RIN2-

DEN2

REN2

DOUT2-

ROUT2

DOUT2+

Vcc

GND

DEN1

DIN1

RIN1-

RIN1+

DOUT1+

16

15

RIN2+

DIN2

9

DOUT1-

REN1

ROUT1

18

17

Table 2. Truth table: Driver

Enables

Input

Output

DEN

DIN

DOUT+

DOUT-

LX

Z

Z

H or floating

(internal pull-up)

LL

H

HH

L

Open

L

H

Table 3. Truth table: Receiver

Enables

Input

Output

REN

RIN+ - RIN-

ROUT

LX

Z

H or floating

(internal pull-up)

Vid

 0.1 V

H

Vid

 -0.1 V

L

-0.1 V < Vid < +0.1 V

?

Full fail-safe Open/Short or

terminated

H