UCC28C53_V01 datasheet(26/48 Pages) TI

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9.2.1 Design Requirements

Table 9-1 shows a typical set of performance requirements for an off-line flyback converter capable of providing

48 W at 12-V output voltage from a universal AC input. The design uses peak primary current control in a

continuous current mode PWM converter.

Table 9-1. Design Parameters

PARAMETER

TEST CONDITIONS

MIN

NOM

MAX

UNIT

VIN

Input Voltage

115/230

265

VRMS

fLINE

Line Frequency

50/60

VOUT

Output Voltage

IVOUT(min) ≤ IVOUT ≤ IVOUT(max)

11.75

12.25

VRIPPLE

Output Ripple Voltage

IVOUT(min) ≤ IVOUT ≤ IVOUT(max)

100

mVpp

IVOUT

Output Current

fSW

Switching Frequency

110

kHz

Efficiency

85%

9.2.2 Detailed Design Procedure

This procedure outlines the steps to design an off-line universal input continuous current mode (CCM) flyback

converter. See Figure 9-3 for component names referred to in the design procedure.

9.2.2.1 Input Bulk Capacitor and Minimum Bulk Voltage

Bulk capacitance may consist of one or more capacitors connected in parallel, often with some inductance

between them to suppress differential-mode conducted noise. The value of the input capacitor sets the minimum

bulk voltage;. Setting the bulk voltage lower by using minimal input capacitance results in higher peak primary

currents leading to more stress on the MOSFET switch, the transformer, and the output capacitors. Setting

the bulk voltage higher by using a larger input capacitor results in higher peak current from the input source

and the capacitor itself is physically larger. Compromising between size and component stresses determines

the acceptable minimum input voltage. The total required value for the primary-side bulk capacitance (CIN) is

selected based upon the power level of the converter (POUT), the efficiency target (η), the minimum input voltage

(VIN(min)), and is chosen to maintain an acceptable minimum bulk voltage level (VBULK(min)), using Equation 3.

CIN =

2 × PIN ×

F0.25+1

N × arcsin

F VBULK(min)

¾2 × V

IN (min )GG

k2 × V

IN (min )

F V

BULK (min )

o × fLINE (min )

(3)

where

• VIN(min) is the RMS value of the minimum AC input voltage (85 VRMS) whose minimum line frequency is

denoted as fLINE(min), equal to 47 Hz

Based on Equation 3, to achieve a minimum bulk voltage of 75 V, assuming 85% converter efficiency, the bulk

capacitor must be larger than 126 µF. this design uses a value of 180 µF, with consideration for component

tolerances and efficiency estimation.

9.2.2.2 Transformer Turns Ratio and Maximum Duty Cycle

The transformer design begins with selecting a suitable switching frequency for the given application. The

UCC28C42 is capable of switching up to 1 MHz but considerations such as overall converter size, switching

losses, core loss, system compatibility, and interference with communication frequency bands generally

determine an optimum frequency that should be used. For this off-line converter, the switching frequency (fSW) is

selected to be 110 kHz as a compromise to minimize the transformer size and the EMI filter size, and still have

acceptable losses.

UCC28C53, UCC28C54, UCC28C55

UCC28C56H, UCC28C57H, UCC28C57L, UCC28C59

SLUSER8 – JUNE 2022

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