CONVENIENCE TIMER

AUTOMOTIVE, 125°C OPERATION, 2-WIRE TIMER WITH BUILT-IN QUARTZ CRYSTAL

S-35710M A Series

16

5. Read operation of time register

Transmit the start condition and slave address from the master device. The slave address of the S-35710M is

specified to "0110010". Next, the data of the time register can be read when the read / write bit is "1".

The 2nd byte to the 4th byte are used as the time register. Each byte from B7 is transmitted.

When the read operation of the time register is finished, transmit "1" (NO_ACK) to the acknowledge after B0 is output

from the master device, and then transmit the stop condition.

The time register is a 3-byte register. "1" is read if the read operation is performed continuously after reading 3 bytes of

the time register. Regarding the time register, refer to " Configuration of Registers".

1

18

9

27

36

0

Slave address

(0110010)

Take in the counter value at this timing and transmit it as a serial data.

Input NO_ACK after the 3rd byte data is transmitted.

Time register (3-byte)

: Master device input data

: S-35710M output data

11

B7

00 1

1

0

B1 R/W

B7

B0

B7

B7

B0

B0

SCL

SDA

Figure 18 Read Timing of Time Register

6. Write operation of wake-up time register

Transmit the start condition and slave address from the master device. The slave address of the S-35710M is

specified to "0110010". Next, transmit "0" to the read / write bit.

Transmit the 2nd byte data. Set B7 to "1" since it is an address pointer. Set B6 to B1 to "0" or "1" since they are dummy

data. Make sure to set B0 to "1" since it is a test bit.

The 3rd byte to the 5th byte are used as the wake-up time register.

Transmit the stop condition from the master device to finish the access operation.

Regarding the wake-up time register, refer to " Configuration of Registers".

Write operation of the wake-up time register is performed each byte, so transmit the data in 3-byte unit. Note that the

S-35710M may not operate as desired if the the data is not transmitted in 3-byte unit.

1

9

18

27

36

45

SCL

WU[7:0]

Write timing

WU[15:8]

Write timing

WU[23:16]

Write timing

1

0

0

1

0

0

1

1

0

B1R/W

B7

B0

B7

B0

B7

B0

B7

B0

B7

1

SDA

Wake-up time register (3-byte)

Dummy data

*1

Slave address

(0110010)

Make sure to set B0 to "1" since it is a test bit.

Set B7 as an address pointer.

*1. Set B6 to B1 to "0" or "1" since they are dummy data.

: S-35710M output data

: Master device input data

Figure 19 Write Timing of Wake-up Time Register