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PCA9541APW/01 bảng dữ liệu(PDF) 12 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  2-to-1 I2C-bus master selector with interrupt logic and reset
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PCA9541A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 5 — 24 April 2014
12 of 45
NXP Semiconductors
PCA9541A
2-to-1 I2C-bus master selector with interrupt logic and reset
[1]
BUSON and NBUSON is an exclusive-OR type function where:
Equal values (00b or 11b) means that the connection between the upstream and the downstream channels
is off.
Different values (01b or 10b) means that the connection between the upstream and the downstream
channels is on.
Switch to the new channel is done when the master initiating the switch request sends a
STOP command to the PCA9541A.
If either master wants to change the connection of the downstream channel, it must write
to its Control Register (Reg#01), and then send a STOP command because an update
of the connection to the downstream according to the values in the two internal Control
Registers happens only on a STOP command. Writing to one control register followed by
a STOP condition on the other master's channel does not cause an update to the
downstream connection.
When both masters request a switch to their own channel at the same time, the master
who last wrote to its Control Register before the PCA9541A receives a STOP command
wins the switching sequence. There is no arbitration performed.
The Auto Increment feature (AI = 1) allows programming the PCA9541A in 4 bytes:
Start
111A3A2A1A0 + 0
PCA9541 Address + Write
00010000
Select Reg#00 with AI = 1
Data Reg#00
Interrupt Enable Register data
Data Reg#01
Control Register data
Stop
Table 12 describes which command must be written to the Control Register when a
master device wants to take control of the I2C-bus. Byte written to the Control Register is
a function of the current I2C-bus control status performed after an initial reading of the
Control Register.
Table 10.
BUSON and NBUSON truth table
NBUSON[1] BUSON[1]
Slave channel
00
off
10
on
01
on
11
off
Table 11.
Default Control Register values
Type version
Master
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
NTESTON
TESTON
not used
BUSINIT
NBUSON
BUSON
NMYBUS
MYBUS
PCA9541A/01 MST_0
0000
010
0
MST_1
0000
101
0
PCA9541A/03 MST_0
0000
000
0
MST_1
0000
001
0



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