PCA9541APWSLASH01 datasheet(25/45 Pages) NXP

25 / 45 page

PCA9541A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 24 April 2014

25 of 45

NXP Semiconductors

PCA9541A

2-to-1 I2C-bus master selector with interrupt logic and reset

9.2 High reliability systems

In a typical multipoint application, shown in Figure 18, the two masters (for example,

primary and back-up) are located on separate I2C-buses that connect to multiple

downstream I2C-bus slave cards/devices via a PCA9541A/01 for non-hot swap

applications to provide high reliability of the I2C-bus.

I2C-bus commands are sent via the primary or back-up master and either master can take

command of the I2C-bus. Either master at any time can gain control of the slave devices if

the other master is disabled or removed from the system. The failed master is isolated

from the system and does not affect communication between the on-line master and the

slave devices located on the cards.

For even higher reliability in multipoint backplane applications, two dedicated masters can

be used for every card as shown in Figure 19.

Fig 18. High reliability backplane application

Fig 19. Very high reliability backplane application

002aae662

SCL1

SDA1

SCL0

SDA0

002aae663

SCL1

SDA1

SCL0

SDA0

SCL0

SDA0

SCL0

SDA0

SCL0

SDA0

SCL1

SDA1

SCL1

SDA1

SCL1

SDA1

PCA9541APW/01 bảng dữ liệu(PDF) 25 Page - NXP Semiconductors

PCA9541APW/01 bảng dữ liệu(HTML) 25 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

bảng dữ liệu tải về

Link URL