PCA9541APWSLASH01 datasheet(27/45 Pages) NXP

tên linh kiện	PCA9541APW/01

Giải thích chi tiết về linh kiện	2-to-1 I2C-bus master selector with interrupt logic and reset

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PCA9541A

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Product data sheet

Rev. 5 — 24 April 2014

27 of 45

NXP Semiconductors

PCA9541A

2-to-1 I2C-bus master selector with interrupt logic and reset

9.5 Bus initialization/recovery to initialize slaves without hardware reset

If the I2C-bus is hung, I2C-bus devices without a hardware reset pin (for example, Slave 1

and Slave 2 in Figure 22) can be isolated from the master by the PCA9541A/03. The

PCA9541A/03 disconnects the bus when it is reset via the hardware reset line, restoring

the master's control of the rest of the bus (for example, Slave 0). The bus master can then

command the PCA9541A/03 to send 9 clock pulses/STOP condition to reset the

downstream I2C-bus devices before they are reconnected to the master or leave the

downstream devices isolated.

Fig 21. Gatekeeper multiplexer application

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Fig 22. Bus initialization/recovery application

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PCA9541A/03

SLAVE 1

SDA

SCL

SLAVE 2

slave I2C-bus

MASTER

SLAVE 0

RESET

SDA/SCL

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