SST25PF040C datasheet(17/47 Pages) MICROCHIP

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DS20005397F-page 17

SST25PF040C

5.10

Write Enable (WREN)

The Write Enable (WREN) instruction, 06H, sets the

Write Enable Latch bit in the STATUS Register to ‘1’

allowing write operations to occur. The WREN instruction

must be executed prior to any Write (Program/Erase)

operation. The WREN instruction may also be used to

allow execution of the Write STATUS Register (WRSR)

instruction; however, the Write Enable Latch bit in the

STATUS Register will be cleared upon the rising edge

CE# of the WRSR instruction. CE# must be driven low

before entering the WREN instruction, and CE# must be

driven high before executing the WREN instruction. See

Figure 5-10 for the WREN instruction sequence.

FIGURE 5-10:

WRITE ENABLE (WREN) SEQUENCE

5.11

Write Disable (WRDI)

The Write Disable (WRDI) instruction, 04H, resets the

Write Enable Latch bit to ‘0’, thus preventing any new

Write operations. CE# must be driven low before enter-

ing the WRDI instruction, and CE# must be driven high

before executing the WRDI instruction. See Figure 5-11

for the WRDI instruction sequence.

FIGURE 5-11:

WRITE DISABLE (WRDI) SEQUENCE

CE#

SCK

0 1 234 5 6 7

High-Impedance

MODE 0

MODE 3

MSb

CE#

SCK

0 1 234 5 6 7

High-Impedance

MODE 0

MODE 3

MSb

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