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AD4697 bảng dữ liệu(PDF) 74 Page - Analog Devices

tên linh kiện AD4697
Giải thích chi tiết về linh kiện  16-Bit, 8-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADC
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AD4697 bảng dữ liệu(HTML) 74 Page - Analog Devices

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Data Sheet
AD4697/AD4698
APPLICATIONS INFORMATION
analog.com
Rev. 0 | 74 of 107
Reference Circuit Design for Driving REF Input
Figure 116 shows a typical connection diagram for the reference
circuitry driving the REF input of the AD4697/AD4698.
The device driving the REF input must have sufficiently low output
impedance so that the reference input current does not cause VREF
to deviate enough to violate the system performance targets. To
achieve data sheet performance, VREF must remain within half an
LSB. The maximum output impedance of the device driving the
REF input (RO_MAX) is therefore:
RO_MAX=VREF216+1
IREF
 
(15)
where IREF is the average REF input current.
Most voltage references specify load regulation in ppm/mA, which
can be converted to effective output impedance with the following:
LMAX=1000×RO_MAXVREF
(16)
whereLMAX is the load regulation specification for the voltage refer-
ence in ppm/mA that corresponds to the calculated RO_MAX.
IREF is typically 11 µA at 1 MSPS with reference input high-Z mode
enabled and 320 µA at 1 MSPS with reference input high-Z mode
disabled (in unipolar mode). IREF scales linearly with the ADC sam-
ple rate (see Table 1 and Figure 40). The output impedance and
load regulation requirements of the reference circuitry are therefore
less strict at lower sample rates. Table 27 shows the calculated
RO_MAX and LMAX for VREF = 5 V and for different sample rates and
with reference input high-Z mode disabled and enabled. Table 27
also provides recommendations for voltage references and discrete
reference buffers for each of these conditions.
Note when driving the REF input on the WLCSP option of the
AD4698, the internal reference buffer must be disabled, and the ref-
erence buffer bypass switch must be open (see SWBP in Figure 74).
The internal reference buffer is disabled by default (REFBUF_EN =
0), and the SWBP is open by default (REFBUF_BP = 0).
Figure 116. Typical Connection Diagram for Driving REF Input
Table 27. Reference Circuitry Recommendations, REF Input
Sample Rate
Reference Input
High-Z Mode
IREF (µA)
RO_MAX (Ω)
LMAX (ppm/mA)
Recommended Voltage References and Reference Buffers
1 MSPS
Disabled
320
0.12
24
ADR4550 with ADA4807-1, ADR445 with ADA4807-1, ADR435
1 MSPS
Enabled
12
3.2
640
ADR4550, ADR445, ADR435
500 kSPS
Disabled
160
0.24
48
ADR445 with ADA4807-1, ADR4550, ADR435
500 kSPS
Enabled
6
6.4
320
ADR4550, ADR445, ADR435



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