M64893AFP datasheet(2/12 Pages) MITSUBISHI

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M64893AFP/AGP

SERIAL INPUT PLL FREQUENCY SYNTHESIZER FOR TV/VCR

MITSUBISHI BIPOLAR DIGITAL ICs

MITSUBISHI

-12

Pin description

Symbol

f in

GND

Vcc1

Vcc2

BS4

BS3

BS2

BS1

Vin

Vtu

Vcc3

LD/ f test

CLOCK

DATA

ENABLE

X in

Pin No.

Pin name

Prescaler input

GND

Power supply voltage 1

Power supply voltage 2

Band switching

outputs

Filter input

(Charge pump output)

Tuning output

Power supply voltage 3

Lock detect/ Test port

Clock input

Data input

Enable input

This is connected to the

crystal oscillator.

Function

Input for the VCO frequency.

Ground to 0V.

Power supply voltage terminal. 5.0 ±0.5V

Power supply for band switching,Vcc1 to 13.2V

PNP open collector method is used.

When the band switching data is "H",the output is ON.

When it is "L",the output is OFF.

This is the output terminal for the LPF input and charge

pump output. When the phase of the programmable divider

output ( f 1/N) is ahead compared to the reference

frequency (fref), the "source" current state becomes active.

If it is behind, the "sink" current becomes active.

If the phases are the same, the high impedance state

becomes active.

This supplies the tuning voltage.

Power supply voltage for tuning voltage 28 to 35V

When 19 bit data is input,lock detector is output.

When 27 bit data is input, lock detector is output,

the programmable freq. Divider output and reference freq.

Output is selected by the test mode.

Data is read into the shift register when the clock signal falls.

Input for band SW and programmable freq. divider set up.

This is normally at a "L". When this is at "H", data and clock

signals are received. Data is read into the latch when the 19th

pulse of the clock signal falls.

4.0MHz crystal oscillator is connected.

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