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FAM65CR51AXZ2 bảng dữ liệu(PDF) 6 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  Boost Converter Stage in APM16 Series for Multiphase and Semi-Bridgeless PFC with SiC Diodes
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PARAMETER DEFINITIONS
Reference to Table 3: Parameter of MOSFET Electrical Specifications
BVDSS
Q1, Q2 MOSFET Drain−to−Source Breakdown Voltage
The maximum drain−to−source voltage the MOSFET can endure without the avalanche breakdown of the body− drain
P−N junction in off state.
The measurement conditions are to be found in Table 3.
The typ. Temperature behavior is described in Figure 13
VGS(th)
Q1, Q2 MOSFET Gate to Source Threshold Voltage
The gate−to−source voltage measurement is triggered by a threshold ID current given in conditions at Table 4.
The typ. Temperature behavior can be found in Figure 10
RDS(ON)
Q1, Q2 MOSFET On Resistance
RDS(on) is the total resistance between the source and the drain during the on state.
The measurement conditions are to be found in Table 3.
The typ behavior can be found in Figure 11 and Figure 12 as well as Figure 17
gFS
Q1, Q2 MOSFET Forward Transconductance
Transconductance is the gain in the MOSFET, expressed in the Equation below.
It describes the change in drain current by the change in the gate−source bias voltage: gfs = [DIDS / DVGS ]VDS
IGSS
Q1, Q2 MOSFET Gate−to−Source Leakage Current
The current flowing from Gate to Source at the maximum allowed VGS
The measurement conditions are described in the Table 3.
IDSS
Q1, Q2 MOSFET Drain−to−Source Leakage Current
Drain – Source current is measured in off state while providing the maximum allowed drain−to-source voltage and the
gate is shorted to the source.
IDSS has a positive temperature coefficient.



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