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AS4LC2M8S0 bảng dữ liệu(PDF) 23 Page - Alliance Semiconductor Corporation

tên linh kiện AS4LC2M8S0
Giải thích chi tiết về linh kiện  3.3V 2M 횞 8/1M 횞 16 CMOS synchronous DRAM
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nhà sản xuất  ALSC [Alliance Semiconductor Corporation]
Trang chủ  https://www.alliancememory.com
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AS4LC2M8S0 bảng dữ liệu(HTML) 23 Page - Alliance Semiconductor Corporation

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AS4LC2M8S1
AS4LC1M16S1
5/21/01; v.1.1
Alliance Semiconductor
P. 23 of 29
Self refresh waveform
Power down mode waveform
(CL = 3)
Enter power down mode by pulling CKE low.
All input/output buffers (except CKE buffer) are turned off in power down mode.
When CKE goes high, command input must be equal to no operation at next CLK rising edge.
CLK
CS
RAS
CAS
WE
A11
A0–A10
DQM
CKE
DQ
Precharge both banks
tRC
Self refresh entry
Self refresh exit
Self refresh
Arbitrary cycle
cycle
Clock stable before
self refresh exit
Power down mode
Active standby
CLK
CS
RAS
CAS
WE
A11
A10
A0–A9
DQM
CKE
DQ
RAa
RAa
CAa
CAx
RAa
RAa
Bank activate
Power down mode entry
Power down mode exit
NOP
Power down mode entry
Power down mode
Precharge standby
NOP
Power down mode exit
Bank activate
Data burst



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